102 lines
4.7 KiB
Plaintext
102 lines
4.7 KiB
Plaintext
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<<<
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:sectnums:
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==== Custom Functions Subsystem (CFS)
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[cols="<3,<3,<4"]
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[frame="topbot",grid="none"]
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|=======================
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| Hardware source file(s): | neorv32_cfs.vhd |
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| Software driver file(s): | neorv32_cfs.c |
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| | neorv32_cfs.h |
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| Top entity port: | `cfs_in_i` | custom input conduit
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| | `cfs_out_o` | custom output conduit
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| Configuration generics: | `IO_CFS_EN` | implement CFS when `true`
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| | `IO_CFS_CONFIG` | custom generic conduit
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| | `IO_CFS_IN_SIZE` | size of `cfs_in_i`
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| | `IO_CFS_OUT_SIZE` | size of `cfs_out_o`
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| CPU interrupts: | fast IRQ channel 1 | CFS interrupt (see <<_processor_interrupts>>)
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|=======================
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**Theory of Operation**
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The custom functions subsystem is meant for implementing custom tightly-coupled co-processors or interfaces.
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IT provides up to 64 32-bit memory-mapped read/write registers (`REG`, see register map below) that can be
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accessed by the CPU via normal load/store operations. The actual functionality of these register has to be
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defined by the hardware designer. Furthermore, the CFS provides two IO conduits to implement custom on-chip
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or off-chip interfaces.
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Just like any other externally-connected IP, logic implemented within the custom functions subsystem can operate
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_independently_ of the CPU providing true parallel processing capabilities. Potential use cases might include
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dedicated hardware accelerators for en-/decryption (AES), signal processing (FFT) or AI applications
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(CNNs) as well as custom IO systems like fast memory interfaces (DDR) and mass storage (SDIO), networking (CAN)
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or real-time data transport (I2S).
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[TIP]
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If you like to implement _custom instructions_ that are executed right within the CPU's ALU
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see the <<_zxcfu_isa_extension>> and the according <<_custom_functions_unit_cfu>>.
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[TIP]
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Take a look at the template CFS VHDL source file (`rtl/core/neorv32_cfs.vhd`). The file is highly
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commented to illustrate all aspects that are relevant for implementing custom CFS-based co-processor designs.
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[TIP]
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The CFS can also be used to _replicate_ existing NEORV32 modules - for example to implement several TWI controllers.
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**CFS Software Access**
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The CFS memory-mapped registers can be accessed by software using the provided C-language aliases (see
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register map table below). Note that all interface registers are defined as 32-bit words of type `uint32_t`.
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.CFS Software Access Example
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[source,c]
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----
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// C-code CFS usage example
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NEORV32_CFS->REG[0] = (uint32_t)some_data_array(i); // write to CFS register 0
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int temp = (int)NEORV32_CFS->REG[20]; // read from CFS register 20
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----
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**CFS Interrupt**
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The CFS provides a single high-level-triggered interrupt request signal mapped to the CPU's fast interrupt channel 1.
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Once triggered, the interrupt becomes pending (if enabled in the <<_mie>> CSR) and has to be explicitly cleared again by
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writing zero to the according <<_mip>> CSR bit. See section <<_processor_interrupts>> for more information.
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**CFS Configuration Generic**
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By default, the CFS provides a single 32-bit `std_ulogic_vector` configuration generic `IO_CFS_CONFIG`
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that is available in the processor's top entity. This generic can be used to pass custom configuration options
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from the top entity directly down to the CFS. The actual definition of the generic and it's usage inside the
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CFS is left to the hardware designer.
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**CFS Custom IOs**
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By default, the CFS also provides two unidirectional input and output conduits `cfs_in_i` and `cfs_out_o`.
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These signals are directly propagated to the processor's top entity. These conduits can be used to implement
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application-specific interfaces like memory or peripheral connections. The actual use case of these signals
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has to be defined by the hardware designer.
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The size of the input signal conduit `cfs_in_i` is defined via the top's `IO_CFS_IN_SIZE` configuration
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generic (default = 32-bit). The size of the output signal conduit `cfs_out_o` is defined via the top's
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`IO_CFS_OUT_SIZE` configuration generic (default = 32-bit). If the custom function subsystem is not implemented
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(`IO_CFS_EN` = false) the `cfs_out_o` signal is tied to all-zero.
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**Register Map**
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.CFS register map (`struct NEORV32_CFS`)
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[cols="^4,<2,^2,^2,<6"]
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[options="header",grid="all"]
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|=======================
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| Address | Name [C] | Bit(s) | R/W | Function
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| `0xffffeb00` | `REG[0]` |`31:0` | (r)/(w) | custom CFS register 0
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| `0xffffeb04` | `REG[1]` |`31:0` | (r)/(w) | custom CFS register 1
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| ... | ... |`31:0` | (r)/(w) | ...
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| `0xffffebf8` | `REG[62]` |`31:0` | (r)/(w) | custom CFS register 62
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| `0xffffebfc` | `REG[63]` |`31:0` | (r)/(w) | custom CFS register 63
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|=======================
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