138 lines
6.3 KiB
C
138 lines
6.3 KiB
C
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// #################################################################################################
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// # << NEORV32 - IRQ driven SPI transfer application example >> #
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// # ********************************************************************************************* #
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// # BSD 3-Clause License #
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// # #
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// # Copyright (c) 2023, Stephan Nolting. All rights reserved. #
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// # #
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// # Redistribution and use in source and binary forms, with or without modification, are #
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// # permitted provided that the following conditions are met: #
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// # #
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// # 1. Redistributions of source code must retain the above copyright notice, this list of #
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// # conditions and the following disclaimer. #
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// # #
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// # 2. Redistributions in binary form must reproduce the above copyright notice, this list of #
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// # conditions and the following disclaimer in the documentation and/or other materials #
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// # provided with the distribution. #
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// # #
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// # 3. Neither the name of the copyright holder nor the names of its contributors may be used to #
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// # endorse or promote products derived from this software without specific prior written #
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// # permission. #
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// # #
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// # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS #
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// # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF #
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// # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE #
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// # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, #
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// # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE #
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// # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED #
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// # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING #
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// # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED #
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// # OF THE POSSIBILITY OF SUCH DAMAGE. #
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// # ********************************************************************************************* #
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// # The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
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// #################################################################################################
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/**********************************************************************//**
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* @file demo_spi_irq/main.c
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* @author Andreas Kaeberlein
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* @brief Example of an ISR driven SPI transfer
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**************************************************************************/
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#include <neorv32.h>
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#include <string.h>
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#include "neorv32_spi_irq.h"
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/**********************************************************************//**
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* @name User configuration
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**************************************************************************/
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/**@{*/
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/** UART BAUD rate */
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#define BAUD_RATE 19200
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/**@}*/
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// Global variables
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t_neorv32_spi g_neorv32_spi;
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/**********************************************************************//**
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* SPI Interrupt Handler
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*
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* @note Captures/Transmits the data to the SPI core
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*
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* @return void.
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**************************************************************************/
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void spi_irq_handler(void)
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{
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neorv32_spi_isr(&g_neorv32_spi);
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}
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/**********************************************************************//**
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* This program demonstrates the usage of an ISR driven SPI transfer
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*
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* @note This program requires the UART and the SPI to be synthesized.
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*
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* @return Irrelevant.
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**************************************************************************/
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int main()
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{
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// SPI Transceiver buffer
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uint8_t uint8MemBuf[10];
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// capture all exceptions and give debug info via UART
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// this is not required, but keeps us safe
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neorv32_rte_setup();
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// setup UART at default baud rate, no interrupts
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neorv32_uart0_setup(BAUD_RATE, 0);
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// check if UART0 unit is implemented at all
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if (neorv32_uart0_available() == 0) {
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return 1;
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}
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// intro
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neorv32_uart0_printf("\n<<< IRQ driven SPI transfer >>>\n\n");
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// check if SPI unit is implemented at all
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if (neorv32_spi_available() == 0) {
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neorv32_uart0_printf("ERROR! No SPI unit implemented.");
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return 1;
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}
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// enable IRQ system
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neorv32_rte_handler_install(SPI_RTE_ID, spi_irq_handler); // SPI to RTE
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neorv32_cpu_csr_set(CSR_MIE, 1 << SPI_FIRQ_ENABLE); // enable SPI FIRQ
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neorv32_cpu_csr_set(CSR_MSTATUS, 1 << CSR_MSTATUS_MIE); // enable machine-mode interrupts
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// SPI
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// SPI Control
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neorv32_spi_init(&g_neorv32_spi);
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// Configure
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neorv32_spi_disable();
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// neorv32_spi_setup(int prsc, int cdiv, int clk_phase, int clk_polarity, uint32_t irq_mask)
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neorv32_spi_setup(0, 0, 0, 0, 1<<SPI_CTRL_IRQ_TX_EMPTY); // spi mode 0, IRQ: 0-: PHY going idle, 10: TX fifo less than half full, 11: TX fifo empty
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neorv32_spi_enable();
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// IRQ based data transfer
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memset(uint8MemBuf, 0, sizeof(uint8MemBuf)); // fill with 0's
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uint8MemBuf[0] = 0x3;
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uint8MemBuf[1] = 0x0;
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uint8MemBuf[2] = 0x0;
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uint8MemBuf[3] = 0x0;
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// int neorv32_spi_rw(t_neorv32_spi *self, uint8_t csn, void *spi, uint32_t len)
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neorv32_spi_rw(&g_neorv32_spi, 0, uint8MemBuf, sizeof(uint8MemBuf)); // send/receive data
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// Wait for complete, free for other jobs
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while ( neorv32_spi_rw_busy(&g_neorv32_spi) ) {
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__asm("nop");
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}
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// stop program counter
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while ( 1 ) { }
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return 0;
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}
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