108 lines
6.6 KiB
C
108 lines
6.6 KiB
C
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// #################################################################################################
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// # << NEORV32: neorv32_twi.h - Two-Wire Interface Controller (TWI) HW Driver >> #
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// # ********************************************************************************************* #
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// # BSD 3-Clause License #
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// # #
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// # Copyright (c) 2023, Stephan Nolting. All rights reserved. #
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// # #
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// # Redistribution and use in source and binary forms, with or without modification, are #
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// # permitted provided that the following conditions are met: #
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// # #
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// # 1. Redistributions of source code must retain the above copyright notice, this list of #
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// # conditions and the following disclaimer. #
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// # #
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// # 2. Redistributions in binary form must reproduce the above copyright notice, this list of #
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// # conditions and the following disclaimer in the documentation and/or other materials #
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// # provided with the distribution. #
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// # #
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// # 3. Neither the name of the copyright holder nor the names of its contributors may be used to #
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// # endorse or promote products derived from this software without specific prior written #
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// # permission. #
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// # #
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// # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS #
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// # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF #
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// # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE #
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// # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, #
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// # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE #
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// # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED #
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// # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING #
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// # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED #
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// # OF THE POSSIBILITY OF SUCH DAMAGE. #
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// # ********************************************************************************************* #
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// # The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
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// #################################################################################################
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/**********************************************************************//**
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* @file neorv32_twi.h
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* @brief Two-Wire Interface Controller (TWI) HW driver header file.
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*
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* @note These functions should only be used if the TWI unit was synthesized (IO_TWI_EN = true).
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**************************************************************************/
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#ifndef neorv32_twi_h
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#define neorv32_twi_h
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/**********************************************************************//**
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* @name IO Device: Two-Wire Interface Controller (TWI)
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**************************************************************************/
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/**@{*/
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/** TWI module prototype */
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typedef volatile struct __attribute__((packed,aligned(4))) {
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uint32_t CTRL; /**< offset 0: control register (#NEORV32_TWI_CTRL_enum) */
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uint32_t DATA; /**< offset 4: data register (#NEORV32_TWI_DATA_enum) */
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} neorv32_twi_t;
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/** TWI module hardware access (#neorv32_twi_t) */
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#define NEORV32_TWI ((neorv32_twi_t*) (NEORV32_TWI_BASE))
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/** TWI control register bits */
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enum NEORV32_TWI_CTRL_enum {
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TWI_CTRL_EN = 0, /**< TWI control register(0) (r/w): TWI enable */
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TWI_CTRL_START = 1, /**< TWI control register(1) (-/w): Generate START condition, auto-clears */
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TWI_CTRL_STOP = 2, /**< TWI control register(2) (-/w): Generate STOP condition, auto-clears */
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TWI_CTRL_MACK = 3, /**< TWI control register(3) (r/w): Generate ACK by controller for each transmission */
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TWI_CTRL_CSEN = 4, /**< TWI control register(4) (r/w): Allow clock stretching when set */
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TWI_CTRL_PRSC0 = 5, /**< TWI control register(5) (r/w): Clock prescaler select bit 0 */
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TWI_CTRL_PRSC1 = 6, /**< TWI control register(6) (r/w): Clock prescaler select bit 1 */
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TWI_CTRL_PRSC2 = 7, /**< TWI control register(7) (r/w): Clock prescaler select bit 2 */
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TWI_CTRL_CDIV0 = 8, /**< TWI control register(8) (r/w): Clock divider bit 0 */
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TWI_CTRL_CDIV1 = 9, /**< TWI control register(9) (r/w): Clock divider bit 1 */
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TWI_CTRL_CDIV2 = 10, /**< TWI control register(10) (r/w): Clock divider bit 2 */
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TWI_CTRL_CDIV3 = 11, /**< TWI control register(11) (r/w): Clock divider bit 3 */
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TWI_CTRL_CLAIMED = 29, /**< TWI control register(29) (r/-): Set if the TWI bus is currently claimed by any controller */
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TWI_CTRL_ACK = 30, /**< TWI control register(30) (r/-): ACK received when set */
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TWI_CTRL_BUSY = 31 /**< TWI control register(31) (r/-): Transfer in progress, busy flag */
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};
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/** TWI receive/transmit data register bits */
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enum NEORV32_TWI_DATA_enum {
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TWI_DATA_LSB = 0, /**< TWI data register(0) (r/w): Receive/transmit data (8-bit) LSB */
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TWI_DATA_MSB = 7 /**< TWI data register(7) (r/w): Receive/transmit data (8-bit) MSB */
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};
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/**@}*/
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/**********************************************************************//**
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* @name Prototypes
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**************************************************************************/
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/**@{*/
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int neorv32_twi_available(void);
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void neorv32_twi_setup(int prsc, int cdiv, int csen);
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void neorv32_twi_disable(void);
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void neorv32_twi_enable(void);
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void neorv32_twi_mack_enable(void);
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void neorv32_twi_mack_disable(void);
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int neorv32_twi_busy(void);
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int neorv32_twi_start_trans(uint8_t a);
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int neorv32_twi_trans(uint8_t d);
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uint8_t neorv32_twi_get_data(void);
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void neorv32_twi_generate_stop(void);
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void neorv32_twi_generate_start(void);
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int neorv32_twi_bus_claimed(void);
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/**@}*/
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#endif // neorv32_twi_h
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