125 lines
6.0 KiB
C
125 lines
6.0 KiB
C
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// #################################################################################################
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// # << NEORV32 - RISC-V Machine Timer (MTIME) Demo Program >> #
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// # ********************************************************************************************* #
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// # BSD 3-Clause License #
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// # #
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// # Copyright (c) 2023, Stephan Nolting. All rights reserved. #
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// # #
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// # Redistribution and use in source and binary forms, with or without modification, are #
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// # permitted provided that the following conditions are met: #
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// # #
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// # 1. Redistributions of source code must retain the above copyright notice, this list of #
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// # conditions and the following disclaimer. #
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// # #
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// # 2. Redistributions in binary form must reproduce the above copyright notice, this list of #
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// # conditions and the following disclaimer in the documentation and/or other materials #
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// # provided with the distribution. #
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// # #
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// # 3. Neither the name of the copyright holder nor the names of its contributors may be used to #
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// # endorse or promote products derived from this software without specific prior written #
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// # permission. #
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// # #
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// # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS #
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// # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF #
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// # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE #
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// # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, #
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// # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE #
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// # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED #
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// # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING #
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// # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED #
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// # OF THE POSSIBILITY OF SUCH DAMAGE. #
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// # ********************************************************************************************* #
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// # The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
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// #################################################################################################
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/**********************************************************************//**
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* @file demo_mtime/main.c
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* @author Stephan Nolting
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* @brief Simple machine timer (MTIME) usage example.
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**************************************************************************/
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#include <neorv32.h>
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/**********************************************************************//**
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* @name User configuration
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**************************************************************************/
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/**@{*/
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/** UART BAUD rate */
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#define BAUD_RATE 19200
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/**@}*/
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// Prototypes
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void mtime_irq_handler(void);
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/**********************************************************************//**
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* This program blinks an LED at GPIO.output(0) at 1Hz using the machine timer interrupt.
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*
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* @note This program requires the MTIME unit to be synthesized (and UART0 and GPIO).
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*
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* @return Should not return;
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**************************************************************************/
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int main() {
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// capture all exceptions and give debug info via UART
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neorv32_rte_setup();
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// setup UART at default baud rate, no interrupts
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neorv32_uart0_setup(BAUD_RATE, 0);
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// check if MTIME unit is implemented at all
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if (neorv32_mtime_available() == 0) {
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neorv32_uart0_puts("ERROR! MTIME timer not implemented!\n");
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return 1;
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}
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// Intro
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neorv32_uart0_puts("RISC-V Machine System Timer (MTIME) demo Program.\n"
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"Toggles GPIO.output(0) at 1Hz using the RISC-V 'MTI' interrupt.\n\n");
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// clear GPIO output port
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neorv32_gpio_port_set(0);
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// install MTIME interrupt handler to RTE
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neorv32_rte_handler_install(RTE_TRAP_MTI, mtime_irq_handler);
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// configure MTIME timer's first interrupt to appear after SYSTEM_CLOCK / 2 cycles (toggle at 2Hz)
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// starting from _now_
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neorv32_mtime_set_timecmp(neorv32_mtime_get_time() + (NEORV32_SYSINFO->CLK / 2));
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// enable interrupt
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neorv32_cpu_csr_set(CSR_MIE, 1 << CSR_MIE_MTIE); // enable MTIME interrupt
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neorv32_cpu_csr_set(CSR_MSTATUS, 1 << CSR_MSTATUS_MIE); // enable machine-mode interrupts
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// go to sleep mode and wait for interrupt
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while(1) {
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neorv32_cpu_sleep();
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}
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return 0;
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}
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/**********************************************************************//**
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* MTIME IRQ handler.
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*
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* @warning This function has to be of type "void xyz(void)" and must not use any interrupt attributes!
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**************************************************************************/
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void mtime_irq_handler(void) {
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// update MTIMECMP value for next IRQ (in SYSTEM_CLOCK / 2 cycles)
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// this will also ack/clear the current MTIME interrupt request
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neorv32_mtime_set_timecmp(neorv32_mtime_get_timecmp() + (NEORV32_SYSINFO->CLK / 2));
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neorv32_uart0_putc('.'); // send tick symbol via UART
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neorv32_gpio_pin_toggle(0); // toggle output port bit 0
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}
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