104 lines
6.3 KiB
C
104 lines
6.3 KiB
C
// #################################################################################################
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// # << NEORV32: neorv32_wdt.h - Watchdog Timer (WDT) HW Driver >> #
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// # ********************************************************************************************* #
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// # BSD 3-Clause License #
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// # #
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// # Copyright (c) 2023, Stephan Nolting. All rights reserved. #
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// # #
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// # Redistribution and use in source and binary forms, with or without modification, are #
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// # permitted provided that the following conditions are met: #
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// # #
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// # 1. Redistributions of source code must retain the above copyright notice, this list of #
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// # conditions and the following disclaimer. #
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// # #
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// # 2. Redistributions in binary form must reproduce the above copyright notice, this list of #
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// # conditions and the following disclaimer in the documentation and/or other materials #
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// # provided with the distribution. #
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// # #
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// # 3. Neither the name of the copyright holder nor the names of its contributors may be used to #
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// # endorse or promote products derived from this software without specific prior written #
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// # permission. #
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// # #
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// # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS #
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// # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF #
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// # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE #
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// # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, #
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// # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE #
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// # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED #
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// # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING #
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// # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED #
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// # OF THE POSSIBILITY OF SUCH DAMAGE. #
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// # ********************************************************************************************* #
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// # The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
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// #################################################################################################
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/**********************************************************************//**
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* @file neorv32_wdt.h
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* @brief Watchdog Timer (WDT) HW driver header file.
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*
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* @note These functions should only be used if the WDT unit was synthesized (IO_WDT_EN = true).
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**************************************************************************/
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#ifndef neorv32_wdt_h
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#define neorv32_wdt_h
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/**********************************************************************//**
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* @name IO Device: Watchdog Timer (WDT)
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**************************************************************************/
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/**@{*/
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/** WDT module prototype */
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typedef volatile struct __attribute__((packed,aligned(4))) {
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uint32_t CTRL; /**< offset 0: control register (#NEORV32_WDT_CTRL_enum) */
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uint32_t RESET; /**< offset 4: WDT reset trigger (write password to "feed" watchdog) */
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} neorv32_wdt_t;
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/** WDT module hardware access (#neorv32_wdt_t) */
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#define NEORV32_WDT ((neorv32_wdt_t*) (NEORV32_WDT_BASE))
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/** WDT control register bits */
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enum NEORV32_WDT_CTRL_enum {
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WDT_CTRL_EN = 0, /**< WDT control register(0) (r/w): Watchdog enable */
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WDT_CTRL_LOCK = 1, /**< WDT control register(1) (r/w): Lock write access to control register, clears on reset only */
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WDT_CTRL_DBEN = 2, /**< WDT control register(2) (r/w): Allow WDT to continue operation even when CPU is in debug mode */
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WDT_CTRL_SEN = 3, /**< WDT control register(3) (r/w): Allow WDT to continue operation even when CPU is in sleep mode */
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WDT_CTRL_STRICT = 4, /**< WDT control register(4) (r/w): Force hardware reset if reset password is incorrect or if write attempt to locked CTRL register */
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WDT_CTRL_RCAUSE_LO = 5, /**< WDT control register(5) (r/-): Cause of last system reset - low */
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WDT_CTRL_RCAUSE_HI = 6, /**< WDT control register(5) (r/-): Cause of last system reset - high */
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WDT_CTRL_TIMEOUT_LSB = 8, /**< WDT control register(8) (r/w): Timeout value, LSB */
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WDT_CTRL_TIMEOUT_MSB = 31 /**< WDT control register(31) (r/w): Timeout value, MSB */
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};
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/**@}*/
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/**********************************************************************//**
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* Reset Password
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**************************************************************************/
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#define WDT_PASSWORD (0x709D1AB3)
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/**********************************************************************//**
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* Reset Cause
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**************************************************************************/
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enum NEORV32_WDT_RCAUSE_enum {
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WDT_RCAUSE_EXT = 0b00, /**< Reset caused by external signal/pin */
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WDT_RCAUSE_OCD = 0b01, /**< Reset caused by on-chip debugger */
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WDT_RCAUSE_WDT = 0b10 /**< Reset caused by watchdog timer */
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};
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/**********************************************************************//**
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* @name Prototypes
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**************************************************************************/
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/**@{*/
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int neorv32_wdt_available(void);
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void neorv32_wdt_setup(uint32_t timeout, int lock, int debug_en, int sleep_en, int strict);
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int neorv32_wdt_disable(void);
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void neorv32_wdt_feed(void);
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int neorv32_wdt_get_cause(void);
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/**@}*/
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#endif // neorv32_wdt_h
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