neorv32/sim
FPGALover 63dd9360f3 Adding Files 2024-02-24 00:25:27 -08:00
..
simple Adding Files 2024-02-24 00:25:27 -08:00
README.md Adding Files 2024-02-24 00:25:27 -08:00
neorv32_tb.vhd Adding Files 2024-02-24 00:25:27 -08:00
run.py Adding Files 2024-02-24 00:25:27 -08:00
uart_rx.vhd Adding Files 2024-02-24 00:25:27 -08:00
uart_rx_pkg.vhd Adding Files 2024-02-24 00:25:27 -08:00

README.md

Simulation Sources

simple

Simple testbench for the NEORV32 Processor and script for simulation using GHDL.

VUnit testbench

VUnit testbench for the NEORV32 Processor.