added hdmi-thru (without buffering)
basically connected HDMI_IN -> dvi2rgb -> rgb_op0 -> rgb2dvi -> HDMI_OUT rgb_op0 operation: SW0[0] | Description 0 | Normal color 1 | inverted color can get image correctly from my laptop This demo only needs the FPGA bit file to run (no need for vitis apparently)master
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||||
<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
|
||||
<RQSFiles/>
|
||||
</Run>
|
||||
<Run Id="design_1_dvi2rgb_0_0_impl_1" Type="Ft2:EntireDesign" Part="xc7z020clg400-1" ConstrsSet="design_1_dvi2rgb_0_0" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" SynthRun="design_1_dvi2rgb_0_0_synth_1" IncludeInArchive="false" IsChild="false" GenFullBitstream="true" AutoIncrementalDir="$PSRCDIR/utils_1/imports/design_1_dvi2rgb_0_0_impl_1">
|
||||
<Strategy Version="1" Minor="2">
|
||||
<StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2021"/>
|
||||
<Step Id="init_design"/>
|
||||
<Step Id="opt_design"/>
|
||||
<Step Id="power_opt_design"/>
|
||||
<Step Id="place_design"/>
|
||||
<Step Id="post_place_power_opt_design"/>
|
||||
<Step Id="phys_opt_design"/>
|
||||
<Step Id="route_design"/>
|
||||
<Step Id="post_route_phys_opt_design"/>
|
||||
<Step Id="write_bitstream"/>
|
||||
</Strategy>
|
||||
<ReportStrategy Name="Vivado Implementation Default Reports" Flow="Vivado Implementation 2021"/>
|
||||
<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
|
||||
<RQSFiles/>
|
||||
</Run>
|
||||
<Run Id="impl_2" Type="Ft2:EntireDesign" Part="xc7z020clg400-1" ConstrsSet="constrs_1" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" Dir="$PRUNDIR/impl_2" SynthRun="synth_2" IncludeInArchive="true" IsChild="false" GenFullBitstream="true" AutoIncrementalDir="$PSRCDIR/utils_1/imports/impl_2">
|
||||
<Strategy Version="1" Minor="2">
|
||||
<StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2021"/>
|
||||
<Step Id="init_design"/>
|
||||
<Step Id="opt_design"/>
|
||||
<Step Id="power_opt_design"/>
|
||||
<Step Id="place_design"/>
|
||||
<Step Id="post_place_power_opt_design"/>
|
||||
<Step Id="phys_opt_design"/>
|
||||
<Step Id="route_design"/>
|
||||
<Step Id="post_route_phys_opt_design"/>
|
||||
<Step Id="write_bitstream"/>
|
||||
</Strategy>
|
||||
<GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
|
||||
<ReportStrategy Name="Vivado Implementation Default Reports" Flow="Vivado Implementation 2021"/>
|
||||
<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
|
||||
<RQSFiles/>
|
||||
</Run>
|
||||
<Run Id="design_1_rgb_op0_0_0_impl_1" Type="Ft2:EntireDesign" Part="xc7z020clg400-1" ConstrsSet="design_1_rgb_op0_0_0" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" SynthRun="design_1_rgb_op0_0_0_synth_1" IncludeInArchive="false" IsChild="false" GenFullBitstream="true" AutoIncrementalDir="$PSRCDIR/utils_1/imports/design_1_rgb_op0_0_0_impl_1">
|
||||
<Strategy Version="1" Minor="2">
|
||||
<StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2021">
|
||||
<Desc>Default settings for Implementation.</Desc>
|
||||
</StratHandle>
|
||||
<Step Id="init_design"/>
|
||||
<Step Id="opt_design"/>
|
||||
<Step Id="power_opt_design"/>
|
||||
<Step Id="place_design"/>
|
||||
<Step Id="post_place_power_opt_design"/>
|
||||
<Step Id="phys_opt_design"/>
|
||||
<Step Id="route_design"/>
|
||||
<Step Id="post_route_phys_opt_design"/>
|
||||
<Step Id="write_bitstream"/>
|
||||
</Strategy>
|
||||
<ReportStrategy Name="Vivado Implementation Default Reports" Flow="Vivado Implementation 2021"/>
|
||||
<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
|
||||
<RQSFiles/>
|
||||
</Run>
|
||||
</Runs>
|
||||
<Board>
|
||||
<Jumpers/>
|
||||
</Board>
|
||||
<DashboardSummary Version="1" Minor="0">
|
||||
<Dashboards>
|
||||
<Dashboard Name="default_dashboard">
|
||||
<Gadgets>
|
||||
<Gadget Name="drc_1" Type="drc" Version="1" Row="2" Column="0">
|
||||
<GadgetParam Name="REPORTS" Type="string_list" Value="impl_1#impl_1_route_report_drc_0 "/>
|
||||
</Gadget>
|
||||
<Gadget Name="methodology_1" Type="methodology" Version="1" Row="2" Column="1">
|
||||
<GadgetParam Name="REPORTS" Type="string_list" Value="impl_1#impl_1_route_report_methodology_0 "/>
|
||||
</Gadget>
|
||||
<Gadget Name="power_1" Type="power" Version="1" Row="1" Column="0">
|
||||
<GadgetParam Name="REPORTS" Type="string_list" Value="impl_1#impl_1_route_report_power_0 "/>
|
||||
</Gadget>
|
||||
<Gadget Name="timing_1" Type="timing" Version="1" Row="0" Column="1">
|
||||
<GadgetParam Name="REPORTS" Type="string_list" Value="impl_1#impl_1_route_report_timing_summary_0 "/>
|
||||
</Gadget>
|
||||
<Gadget Name="utilization_1" Type="utilization" Version="1" Row="0" Column="0">
|
||||
<GadgetParam Name="REPORTS" Type="string_list" Value="synth_1#synth_1_synth_report_utilization_0 "/>
|
||||
<GadgetParam Name="RUN.STEP" Type="string" Value="synth_design"/>
|
||||
<GadgetParam Name="RUN.TYPE" Type="string" Value="synthesis"/>
|
||||
</Gadget>
|
||||
<Gadget Name="utilization_2" Type="utilization" Version="1" Row="1" Column="1">
|
||||
<GadgetParam Name="REPORTS" Type="string_list" Value="impl_1#impl_1_place_report_utilization_0 "/>
|
||||
</Gadget>
|
||||
</Gadgets>
|
||||
</Dashboard>
|
||||
<CurrentDashboard>default_dashboard</CurrentDashboard>
|
||||
</Dashboards>
|
||||
</DashboardSummary>
|
||||
</Project>
|
|
@ -0,0 +1,29 @@
|
|||
module rgb_op0(
|
||||
|
||||
(* X_INTERFACE_INFO = "xilinx.com:interface:vid_io:1.0 iV ACTIVE_VIDEO" *) input wire iRGB_ACTIVE,
|
||||
(* X_INTERFACE_INFO = "xilinx.com:interface:vid_io:1.0 iV DATA" *) input wire [23:0]iRGB_DATA ,
|
||||
(* X_INTERFACE_INFO = "xilinx.com:interface:vid_io:1.0 iV HSYNC" *) input wire iRGB_HSYNC ,
|
||||
(* X_INTERFACE_INFO = "xilinx.com:interface:vid_io:1.0 iV VSYNC" *) input wire iRGB_VSYNC ,
|
||||
|
||||
|
||||
(* X_INTERFACE_INFO = "xilinx.com:interface:vid_io:1.0 iV VSYNC" *) input wire [1:0] isel,
|
||||
|
||||
(* X_INTERFACE_INFO = "xilinx.com:interface:vid_io:1.0 oV ACTIVE_VIDEO" *) output wire oRGB_ACTIVE,
|
||||
(* X_INTERFACE_INFO = "xilinx.com:interface:vid_io:1.0 oV DATA" *) output wire [23:0]oRGB_DATA ,
|
||||
(* X_INTERFACE_INFO = "xilinx.com:interface:vid_io:1.0 oV HSYNC" *) output wire oRGB_HSYNC ,
|
||||
(* X_INTERFACE_INFO = "xilinx.com:interface:vid_io:1.0 oV VSYNC" *) output wire oRGB_VSYNC
|
||||
|
||||
);
|
||||
|
||||
assign oRGB_ACTIVE = iRGB_ACTIVE;
|
||||
|
||||
//assign oRGB_DATA = iRGB_DATA ;
|
||||
|
||||
assign oRGB_DATA[8*0+:8] =(isel[0])? ~iRGB_DATA[8*0+:8] : iRGB_DATA[8*0+:8];
|
||||
assign oRGB_DATA[8*1+:8] =(isel[0])? ~iRGB_DATA[8*1+:8] : iRGB_DATA[8*1+:8];
|
||||
assign oRGB_DATA[8*2+:8] =(isel[0])? ~iRGB_DATA[8*2+:8] : iRGB_DATA[8*2+:8];
|
||||
|
||||
assign oRGB_HSYNC = iRGB_HSYNC ;
|
||||
assign oRGB_VSYNC = iRGB_VSYNC ;
|
||||
|
||||
endmodule
|
|
@ -0,0 +1,265 @@
|
|||
#set_property IOSTANDARD LVCMOS33 [get_ports {btns_4bits_tri_i_0}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {btns_4bits_tri_i_1}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {btns_4bits_tri_i_2}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {btns_4bits_tri_i_3}]
|
||||
set_property IOSTANDARD LVCMOS33 [get_ports {leds_4bits_tri_o_0}]
|
||||
set_property IOSTANDARD LVCMOS33 [get_ports {leds_4bits_tri_o_1}]
|
||||
set_property IOSTANDARD LVCMOS33 [get_ports {leds_4bits_tri_o_2}]
|
||||
set_property IOSTANDARD LVCMOS33 [get_ports {leds_4bits_tri_o_3}]
|
||||
set_property IOSTANDARD LVCMOS33 [get_ports {sws_2bits_tri_i_0}]
|
||||
set_property IOSTANDARD LVCMOS33 [get_ports {sws_2bits_tri_i_1}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {sys_clk}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {JA1}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {JA2}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {JA3}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {JA4}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {JA7}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {JA8}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {JA9}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {JA10}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {JB1}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {JB2}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {JB3}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {JB4}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {JB7}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {JB8}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {JB9}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {JB10}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {i2c_scl_i}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {i2c_sda_i}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {rgb_led_tri_o_0}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {rgb_led_tri_o_1}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {rgb_led_tri_o_2}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {rgb_led_tri_o_3}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {rgb_led_tri_o_4}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {rgb_led_tri_o_5}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a0_a13_tri_i_0}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a0_a13_tri_i_1}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a0_a13_tri_i_2}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a0_a13_tri_i_3}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a0_a13_tri_i_4}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a0_a13_tri_i_5}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a0_a13_tri_i_6}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a0_a13_tri_i_7}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a0_a13_tri_i_8}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a0_a13_tri_i_9}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a0_a13_tri_i_10}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a0_a13_tri_i_11}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a0_a13_tri_i_12}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a0_a13_tri_i_13}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_0}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_1}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_2}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_3}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_4}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_5}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_6}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_7}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_8}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_9}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_10}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_11}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_12}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_13}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_14}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_15}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_16}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_17}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_18}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_19}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_20}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_21}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_22}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_23}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_24}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {spi_miso_i}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {spi_mosi_i}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {spi_sclk_i}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {spi_ss_i}]
|
||||
set_property IOSTANDARD LVCMOS33 [get_ports {hdmi_rx_hpd}]
|
||||
set_property IOSTANDARD TMDS_33 [get_ports {TMDS_Clk_p_1}]
|
||||
set_property IOSTANDARD TMDS_33 [get_ports {TMDS_Clk_n_1}]
|
||||
set_property IOSTANDARD TMDS_33 [get_ports {TMDS_Data_p_1[0]}]
|
||||
set_property IOSTANDARD TMDS_33 [get_ports {TMDS_Data_p_1[1]}]
|
||||
set_property IOSTANDARD TMDS_33 [get_ports {TMDS_Data_p_1[2]}]
|
||||
set_property IOSTANDARD TMDS_33 [get_ports {TMDS_Data_n_1[0]}]
|
||||
set_property IOSTANDARD TMDS_33 [get_ports {TMDS_Data_n_1[1]}]
|
||||
set_property IOSTANDARD TMDS_33 [get_ports {TMDS_Data_n_1[2]}]
|
||||
set_property IOSTANDARD LVCMOS33 [get_ports {hdmi_tx_hpd}]
|
||||
set_property IOSTANDARD TMDS_33 [get_ports {TMDS_Clk_p_0}]
|
||||
set_property IOSTANDARD TMDS_33 [get_ports {TMDS_Clk_n_0}]
|
||||
set_property IOSTANDARD TMDS_33 [get_ports {TMDS_Data_p_0[0]}]
|
||||
set_property IOSTANDARD TMDS_33 [get_ports {TMDS_Data_p_0[1]}]
|
||||
set_property IOSTANDARD TMDS_33 [get_ports {TMDS_Data_p_0[2]}]
|
||||
set_property IOSTANDARD TMDS_33 [get_ports {TMDS_Data_n_0[0]}]
|
||||
set_property IOSTANDARD TMDS_33 [get_ports {TMDS_Data_n_0[1]}]
|
||||
set_property IOSTANDARD TMDS_33 [get_ports {TMDS_Data_n_0[2]}]
|
||||
set_property IOSTANDARD LVCMOS33 [get_ports {hdmi_in_ddc_scl_io}]
|
||||
set_property IOSTANDARD LVCMOS33 [get_ports {hdmi_in_ddc_sda_io}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {respberry_sd_i}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {respberry_sc_i}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {hdmi_tx_cec}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a0}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a1}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a2}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a3}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a4}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a5}]
|
||||
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {audio_sd_i}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {audio_sc_i}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {audio_adr_0}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {audio_adr_1}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {audio_clk}]
|
||||
#
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {bclk_i}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {wclk_i}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {sdada_out_i}]
|
||||
#set_property IOSTANDARD LVCMOS33 [get_ports {sdata_in_i}]
|
||||
|
||||
#set_property PACKAGE_PIN D19 [get_ports {btns_4bits_tri_i_0}]
|
||||
#set_property PACKAGE_PIN D20 [get_ports {btns_4bits_tri_i_1}]
|
||||
#set_property PACKAGE_PIN L20 [get_ports {btns_4bits_tri_i_2}]
|
||||
#set_property PACKAGE_PIN L19 [get_ports {btns_4bits_tri_i_3}]
|
||||
set_property PACKAGE_PIN R14 [get_ports {leds_4bits_tri_o_0}]
|
||||
set_property PACKAGE_PIN P14 [get_ports {leds_4bits_tri_o_1}]
|
||||
set_property PACKAGE_PIN N16 [get_ports {leds_4bits_tri_o_2}]
|
||||
set_property PACKAGE_PIN M14 [get_ports {leds_4bits_tri_o_3}]
|
||||
set_property PACKAGE_PIN M20 [get_ports {sws_2bits_tri_i_0}]
|
||||
set_property PACKAGE_PIN M19 [get_ports {sws_2bits_tri_i_1}]
|
||||
#set_property PACKAGE_PIN H16 [get_ports {sys_clk}]
|
||||
#set_property PACKAGE_PIN Y18 [get_ports {JA1}]
|
||||
#set_property PACKAGE_PIN Y19 [get_ports {JA2}]
|
||||
#set_property PACKAGE_PIN Y16 [get_ports {JA3}]
|
||||
#set_property PACKAGE_PIN Y17 [get_ports {JA4}]
|
||||
#set_property PACKAGE_PIN U18 [get_ports {JA7}]
|
||||
#set_property PACKAGE_PIN U19 [get_ports {JA8}]
|
||||
#set_property PACKAGE_PIN W18 [get_ports {JA9}]
|
||||
#set_property PACKAGE_PIN W19 [get_ports {JA10}]
|
||||
#set_property PACKAGE_PIN W14 [get_ports {JB1}]
|
||||
#set_property PACKAGE_PIN Y14 [get_ports {JB2}]
|
||||
#set_property PACKAGE_PIN T11 [get_ports {JB3}]
|
||||
#set_property PACKAGE_PIN T10 [get_ports {JB4}]
|
||||
#set_property PACKAGE_PIN V16 [get_ports {JB7}]
|
||||
#set_property PACKAGE_PIN W16 [get_ports {JB8}]
|
||||
#set_property PACKAGE_PIN V12 [get_ports {JB9}]
|
||||
#set_property PACKAGE_PIN W13 [get_ports {JB10}]
|
||||
#set_property PACKAGE_PIN P15 [get_ports {i2c_scl_i}]
|
||||
#set_property PACKAGE_PIN P16 [get_ports {i2c_sda_i}]
|
||||
#set_property PACKAGE_PIN L15 [get_ports {rgb_led_tri_o_0}]
|
||||
#set_property PACKAGE_PIN G17 [get_ports {rgb_led_tri_o_1}]
|
||||
#set_property PACKAGE_PIN N15 [get_ports {rgb_led_tri_o_2}]
|
||||
#set_property PACKAGE_PIN G14 [get_ports {rgb_led_tri_o_3}]
|
||||
#set_property PACKAGE_PIN L14 [get_ports {rgb_led_tri_o_4}]
|
||||
#set_property PACKAGE_PIN M15 [get_ports {rgb_led_tri_o_5}]
|
||||
#set_property PACKAGE_PIN T14 [get_ports {arduino_a0_a13_tri_i_0}]
|
||||
#set_property PACKAGE_PIN U12 [get_ports {arduino_a0_a13_tri_i_1}]
|
||||
#set_property PACKAGE_PIN U13 [get_ports {arduino_a0_a13_tri_i_2}]
|
||||
#set_property PACKAGE_PIN V13 [get_ports {arduino_a0_a13_tri_i_3}]
|
||||
#set_property PACKAGE_PIN V15 [get_ports {arduino_a0_a13_tri_i_4}]
|
||||
#set_property PACKAGE_PIN T15 [get_ports {arduino_a0_a13_tri_i_5}]
|
||||
#set_property PACKAGE_PIN R16 [get_ports {arduino_a0_a13_tri_i_6}]
|
||||
#set_property PACKAGE_PIN U17 [get_ports {arduino_a0_a13_tri_i_7}]
|
||||
#set_property PACKAGE_PIN V17 [get_ports {arduino_a0_a13_tri_i_8}]
|
||||
#set_property PACKAGE_PIN V18 [get_ports {arduino_a0_a13_tri_i_9}]
|
||||
#set_property PACKAGE_PIN T16 [get_ports {arduino_a0_a13_tri_i_10}]
|
||||
#set_property PACKAGE_PIN R17 [get_ports {arduino_a0_a13_tri_i_11}]
|
||||
#set_property PACKAGE_PIN P18 [get_ports {arduino_a0_a13_tri_i_12}]
|
||||
#set_property PACKAGE_PIN N17 [get_ports {arduino_a0_a13_tri_i_13}]
|
||||
#set_property PACKAGE_PIN W18 [get_ports {raspberry_pi_tri_i_0}]
|
||||
#set_property PACKAGE_PIN W19 [get_ports {raspberry_pi_tri_i_1}]
|
||||
#set_property PACKAGE_PIN Y18 [get_ports {raspberry_pi_tri_i_2}]
|
||||
#set_property PACKAGE_PIN Y19 [get_ports {raspberry_pi_tri_i_3}]
|
||||
#set_property PACKAGE_PIN U18 [get_ports {raspberry_pi_tri_i_4}]
|
||||
#set_property PACKAGE_PIN U19 [get_ports {raspberry_pi_tri_i_5}]
|
||||
#set_property PACKAGE_PIN F19 [get_ports {raspberry_pi_tri_i_6}]
|
||||
#set_property PACKAGE_PIN V10 [get_ports {raspberry_pi_tri_i_7}]
|
||||
#set_property PACKAGE_PIN V8 [get_ports {raspberry_pi_tri_i_8}]
|
||||
#set_property PACKAGE_PIN W10 [get_ports {raspberry_pi_tri_i_9}]
|
||||
#set_property PACKAGE_PIN B20 [get_ports {raspberry_pi_tri_i_10}]
|
||||
#set_property PACKAGE_PIN W8 [get_ports {raspberry_pi_tri_i_11}]
|
||||
#set_property PACKAGE_PIN V6 [get_ports {raspberry_pi_tri_i_12}]
|
||||
#set_property PACKAGE_PIN Y6 [get_ports {raspberry_pi_tri_i_13}]
|
||||
#set_property PACKAGE_PIN B19 [get_ports {raspberry_pi_tri_i_14}]
|
||||
#set_property PACKAGE_PIN U7 [get_ports {raspberry_pi_tri_i_15}]
|
||||
#set_property PACKAGE_PIN C20 [get_ports {raspberry_pi_tri_i_16}]
|
||||
#set_property PACKAGE_PIN Y8 [get_ports {raspberry_pi_tri_i_17}]
|
||||
#set_property PACKAGE_PIN A20 [get_ports {raspberry_pi_tri_i_18}]
|
||||
#set_property PACKAGE_PIN Y9 [get_ports {raspberry_pi_tri_i_19}]
|
||||
#set_property PACKAGE_PIN U8 [get_ports {raspberry_pi_tri_i_20}]
|
||||
#set_property PACKAGE_PIN W6 [get_ports {raspberry_pi_tri_i_21}]
|
||||
#set_property PACKAGE_PIN Y7 [get_ports {raspberry_pi_tri_i_22}]
|
||||
#set_property PACKAGE_PIN F20 [get_ports {raspberry_pi_tri_i_23}]
|
||||
#set_property PACKAGE_PIN W9 [get_ports {raspberry_pi_tri_i_24}]
|
||||
#set_property PACKAGE_PIN W15 [get_ports {spi_miso_i}]
|
||||
#set_property PACKAGE_PIN T12 [get_ports {spi_mosi_i}]
|
||||
#set_property PACKAGE_PIN H15 [get_ports {spi_sclk_i}]
|
||||
#set_property PACKAGE_PIN F16 [get_ports {spi_ss_i}]
|
||||
set_property PACKAGE_PIN T19 [get_ports {hdmi_rx_hpd}]
|
||||
set_property PACKAGE_PIN N18 [get_ports {TMDS_Clk_p_1}]
|
||||
set_property PACKAGE_PIN P19 [get_ports {TMDS_Clk_n_1}]
|
||||
set_property PACKAGE_PIN V20 [get_ports {TMDS_Data_p_1[0]}]
|
||||
set_property PACKAGE_PIN T20 [get_ports {TMDS_Data_p_1[1]}]
|
||||
set_property PACKAGE_PIN N20 [get_ports {TMDS_Data_p_1[2]}]
|
||||
set_property PACKAGE_PIN W20 [get_ports {TMDS_Data_n_1[0]}]
|
||||
set_property PACKAGE_PIN U20 [get_ports {TMDS_Data_n_1[1]}]
|
||||
set_property PACKAGE_PIN P20 [get_ports {TMDS_Data_n_1[2]}]
|
||||
set_property PACKAGE_PIN R19 [get_ports {hdmi_tx_hpd}]
|
||||
set_property PACKAGE_PIN L16 [get_ports {TMDS_Clk_p_0}]
|
||||
set_property PACKAGE_PIN L17 [get_ports {TMDS_Clk_n_0}]
|
||||
set_property PACKAGE_PIN K17 [get_ports {TMDS_Data_p_0[0]}]
|
||||
set_property PACKAGE_PIN K19 [get_ports {TMDS_Data_p_0[1]}]
|
||||
set_property PACKAGE_PIN J18 [get_ports {TMDS_Data_p_0[2]}]
|
||||
set_property PACKAGE_PIN K18 [get_ports {TMDS_Data_n_0[0]}]
|
||||
set_property PACKAGE_PIN J19 [get_ports {TMDS_Data_n_0[1]}]
|
||||
set_property PACKAGE_PIN H18 [get_ports {TMDS_Data_n_0[2]}]
|
||||
set_property PACKAGE_PIN U14 [get_ports {hdmi_in_ddc_scl_io}]
|
||||
set_property PACKAGE_PIN U15 [get_ports {hdmi_in_ddc_sda_io}]
|
||||
#set_property PACKAGE_PIN Y16 [get_ports {respberry_sd_i}]
|
||||
#set_property PACKAGE_PIN Y17 [get_ports {respberry_sc_i}]
|
||||
#set_property PACKAGE_PIN G15 [get_ports {hdmi_tx_cec}]
|
||||
#set_property PACKAGE_PIN Y11 [get_ports {arduino_a0}]
|
||||
#set_property PACKAGE_PIN Y12 [get_ports {arduino_a1}]
|
||||
#set_property PACKAGE_PIN W11 [get_ports {arduino_a2}]
|
||||
#set_property PACKAGE_PIN V11 [get_ports {arduino_a3}]
|
||||
#set_property PACKAGE_PIN T5 [get_ports {arduino_a4}]
|
||||
#set_property PACKAGE_PIN U10 [get_ports {arduino_a5}]
|
||||
|
||||
#AU_SDA_R AU_SCL_R ADR0 ADR1 AU_MCLK_R
|
||||
#set_property PACKAGE_PIN T9 [get_ports {audio_sd_i}]
|
||||
#set_property PACKAGE_PIN U9 [get_ports {audio_sc_i}]
|
||||
#set_property PACKAGE_PIN M17 [get_ports {audio_adr_0}]
|
||||
#set_property PACKAGE_PIN M18 [get_ports {audio_adr_1}]
|
||||
#set_property PACKAGE_PIN U5 [get_ports {audio_clk}]
|
||||
#AU_BCLK_R AU_WCLK_R AU_DIN_R AU_DOUT_R
|
||||
#set_property PACKAGE_PIN R18 [get_ports {bclk_i}]
|
||||
#set_property PACKAGE_PIN T17 [get_ports {wclk_i}]
|
||||
#set_property PACKAGE_PIN G18 [get_ports {sdada_out_i}]
|
||||
#set_property PACKAGE_PIN F17 [get_ports {sdata_in_i}]
|
||||
|
||||
#AU_SDA
|
||||
#AU_SCL
|
||||
#ADR0
|
||||
#ADR1
|
||||
#AU_MCLK
|
||||
|
||||
#AU_BCLK
|
||||
#AU_WCLK
|
||||
#AU_DOUT
|
||||
#AU_DIN
|
||||
|
||||
set_property PACKAGE_PIN G18 [get_ports {SDATA_O}]
|
||||
set_property PACKAGE_PIN F17 [get_ports {SDATA_I}]
|
||||
set_property PACKAGE_PIN R18 [get_ports {BCLK_O}]
|
||||
set_property PACKAGE_PIN T17 [get_ports {LRCLK_O}]
|
||||
set_property PACKAGE_PIN U5 [get_ports {MCLK_O}]
|
||||
set_property PACKAGE_PIN U9 [get_ports {iic_rtl_scl_io}]
|
||||
set_property PACKAGE_PIN T9 [get_ports {iic_rtl_sda_io}]
|
||||
|
||||
set_property IOSTANDARD LVCMOS33 [get_ports {SDATA_O}]
|
||||
set_property IOSTANDARD LVCMOS33 [get_ports {SDATA_I}]
|
||||
set_property IOSTANDARD LVCMOS33 [get_ports {BCLK_O}]
|
||||
set_property IOSTANDARD LVCMOS33 [get_ports {LRCLK_O}]
|
||||
set_property IOSTANDARD LVCMOS33 [get_ports {MCLK_O}]
|
||||
set_property IOSTANDARD LVCMOS33 [get_ports {iic_rtl_scl_io}]
|
||||
set_property IOSTANDARD LVCMOS33 [get_ports {iic_rtl_sda_io}]
|
|
@ -0,0 +1,8 @@
|
|||
|
||||
#create_clock -period 13.468 -waveform {0.000 5.000} [get_ports hdmi_rx_clk_p]
|
||||
|
||||
#from digilent datasheet. Compile OK
|
||||
create_clock -period 13.468 -waveform {0.000 5.000} [get_ports TMDS_Clk_p_1]
|
||||
|
||||
#from pynq ref design. compile failed due to VCO issues
|
||||
#create_clock -period 8.334 -waveform {0.000 4.167} [get_ports TMDS_Clk_p_1]
|
Loading…
Reference in New Issue