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added hdmi-in (loop hdmi-out->hdmi-in)

master
neyko3 2024-05-08 14:31:27 +09:00
parent ea535d7e0f
commit fe59f073b7
12 changed files with 5847 additions and 0 deletions
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hdmi-in-test/design_1_wrapper.xsa 100644
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hdmi-in-test/docs/dvi2rgb.pdf 100644
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hdmi-in-test/docs/rgb2dvi.pdf 100644
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hdmi-in-test/hdmi-in-test.runs/impl_1/design_1_wrapper.bit 100644
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hdmi-in-test/hdmi-in-test.srcs/sources_1/bd/design_1/design_1.bd 100644
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hdmi-in-test/hdmi-in-test.vitis/hdmi-in-test.files/Debug/hworld.elf 100755
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hdmi-in-test/hdmi-in-test.vitis/hdmi-in-test.files/src/helloworld.c 100644
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#include <stdio.h>
//#include "platform.h"
#include "xil_printf.h"
#include "xv_tpg.h"
#include "xvtc.h"
int main()
{
//init_platform();
int Status;
XV_tpg tpg_inst; // Instance of the TPG core
XVtc VtcInst; // Instance of the VTC core
print("--- hdmi-in-test ---\n\r");
//--( TPG Initialization
print("TPG Initialization\n\r");
Status = XV_tpg_Initialize(&tpg_inst, XPAR_XV_TPG_0_DEVICE_ID);
if(Status!= XST_SUCCESS)
{
xil_printf("TPG configuration failed\r\n");
return(XST_FAILURE);
}
// Set Resolution to 1280x720
XV_tpg_Set_height(&tpg_inst, 720);
XV_tpg_Set_width(&tpg_inst, 1280);
// Set Color Space to RGB
XV_tpg_Set_colorFormat(&tpg_inst, 0x0);
//Set pattern to color bar
XV_tpg_Set_bckgndId(&tpg_inst, XTPG_BKGND_COLOR_BARS);
//Start the TPG
XV_tpg_EnableAutoRestart(&tpg_inst);
XV_tpg_Start(&tpg_inst);
xil_printf("TPG started!\r\n");
//--)
//--( VTC Initialization
print("VTC Initialization\n\r");
XVtc_Config *Config;
XVtc_Timing ti;
XVtc_Signal si;
XVtc_HoriOffsets ho;
XVtc_Polarity po;
//Initialize the VTC driver so that it's ready to use look up
//configuration in the config table, then initialize it.
Config = XVtc_LookupConfig(XPAR_VTC_0_DEVICE_ID);
if (NULL == Config) {
return (XST_FAILURE);
}
//Initialize the VTC core
Status = XVtc_CfgInitialize(&VtcInst, Config, Config->BaseAddress);
if (Status != (XST_SUCCESS)) {
return (XST_FAILURE);
}
//Perform a self-test
Status = XVtc_SelfTest(&VtcInst);
if (Status != (XST_SUCCESS)) {
return (XST_FAILURE);
}
//Set our configuration as 1280x720
XVtc_ConvVideoMode2Timing(&VtcInst, XVTC_VMODE_720P, &ti);
XVtc_ConvTiming2Signal(&VtcInst, &ti, &si, &ho, &po);
XVtc_SetGenerator(&VtcInst, &si);
//Enable the vtc
XVtc_Enable(&VtcInst);
xil_printf("VTC enabled!\r\n");
//--)
xil_printf("\r\nInstructions:\r\n");
xil_printf("1. connect HDMI_OUT to HDMI_IN\r\n");
xil_printf("2. Check LD1,LD0 are on\r\n");
xil_printf("3. open ila_1 on vivado (connected to hdmi input after tmds2rgb conversion\r\n");
xil_printf("4. trigger it and compare results with logs/hdmi-loop-test-ila.png \r\n");
while(1){
}
cleanup_platform();
return 0;
}

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hdmi-in-test/hdmi-in-test.xpr 100644
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<?xml version="1.0" encoding="UTF-8"?>
<!-- Product Version: Vivado v2021.2 (64-bit) -->
<!-- -->
<!-- Copyright 1986-2021 Xilinx, Inc. All Rights Reserved. -->
<Project Version="7" Minor="56" Path="/home/neyko/DEV/git/PYNQ-Z2_demos/hdmi-in-test/hdmi-in-test.xpr">
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<Option Name="DefaultLib" Val="xil_defaultlib"/>
<Option Name="ProjectType" Val="Default"/>
<Option Name="IPRepoPath" Val="$PPRDIR/../hdmi-out-test/hdmi-out-test.ipdefs"/>
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<Option Name="IPStaticSourceDir" Val="$PIPUSERFILESDIR/ipstatic"/>
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<Option Name="DSABoardId" Val="pynq-z2"/>
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<Option Name="SimTypes" Val="rtl"/>
<Option Name="SimTypes" Val="bfm"/>
<Option Name="SimTypes" Val="tlm"/>
<Option Name="SimTypes" Val="tlm_dpi"/>
<Option Name="MEMEnableMemoryMapGeneration" Val="TRUE"/>
<Option Name="DcpsUptoDate" Val="TRUE"/>
<Option Name="ClassicSocBoot" Val="FALSE"/>
</Configuration>
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<Filter Type="Srcs"/>
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<Attr Name="ImportPath" Val="$PPRDIR/../ARM_DMA_audio/Zedboard-DMA/Zedboard-DMA.srcs/sources_1/bd/design_1/design_1.bd"/>
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</CompFileExtendedInfo>
<CompFileExtendedInfo CompFileName="design_1.bd" FileRelPathName="ip/design_1_axi_dma_0_0/design_1_axi_dma_0_0.xci">
<Proxy FileSetName="design_1_axi_dma_0_0"/>
</CompFileExtendedInfo>
<CompFileExtendedInfo CompFileName="design_1.bd" FileRelPathName="ip/design_1_axi_iic_0_0/design_1_axi_iic_0_0.xci">
<Proxy FileSetName="design_1_axi_iic_0_0"/>
</CompFileExtendedInfo>
<CompFileExtendedInfo CompFileName="design_1.bd" FileRelPathName="ip/design_1_xbar_0/design_1_xbar_0.xci">
<Proxy FileSetName="design_1_xbar_0"/>
</CompFileExtendedInfo>
<CompFileExtendedInfo CompFileName="design_1.bd" FileRelPathName="ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0.xci">
<Proxy FileSetName="design_1_processing_system7_0_0"/>
</CompFileExtendedInfo>
<CompFileExtendedInfo CompFileName="design_1.bd" FileRelPathName="ip/design_1_xbar_1/design_1_xbar_1.xci">
<Proxy FileSetName="design_1_xbar_1"/>
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<CompFileExtendedInfo CompFileName="design_1.bd" FileRelPathName="ip/design_1_rst_processing_system7_0_100M_0/design_1_rst_processing_system7_0_100M_0.xci">
<Proxy FileSetName="design_1_rst_processing_system7_0_100M_0"/>
</CompFileExtendedInfo>
<CompFileExtendedInfo CompFileName="design_1.bd" FileRelPathName="ip/design_1_d_axi_i2s_audio_0_0/design_1_d_axi_i2s_audio_0_0.xci">
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</CompFileExtendedInfo>
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<Proxy FileSetName="design_1_v_axi4s_vid_out_0_0"/>
</CompFileExtendedInfo>
<CompFileExtendedInfo CompFileName="design_1.bd" FileRelPathName="ip/design_1_v_tc_0_0/design_1_v_tc_0_0.xci">
<Proxy FileSetName="design_1_v_tc_0_0"/>
</CompFileExtendedInfo>
<CompFileExtendedInfo CompFileName="design_1.bd" FileRelPathName="ip/design_1_rst_processing_system7_0_100M1_0/design_1_rst_processing_system7_0_100M1_0.xci">
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<CompFileExtendedInfo CompFileName="design_1.bd" FileRelPathName="ip/design_1_v_vid_in_axi4s_0_0/design_1_v_vid_in_axi4s_0_0.xci">
<Proxy FileSetName="design_1_v_vid_in_axi4s_0_0"/>
</CompFileExtendedInfo>
<CompFileExtendedInfo CompFileName="design_1.bd" FileRelPathName="ip/design_1_v_tc_0_1/design_1_v_tc_0_1.xci">
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<Proxy FileSetName="design_1_rst_processing_system7_0_100M_1"/>
</CompFileExtendedInfo>
<CompFileExtendedInfo CompFileName="design_1.bd" FileRelPathName="ip/design_1_dvi2rgb_0_1/design_1_dvi2rgb_0_1.xci">
<Proxy FileSetName="design_1_dvi2rgb_0_1"/>
</CompFileExtendedInfo>
<CompFileExtendedInfo CompFileName="design_1.bd" FileRelPathName="ip/design_1_system_ila_0_1/design_1_system_ila_0_1.xci">
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</File>
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</File>
<Config>
<Option Name="DesignMode" Val="RTL"/>
<Option Name="TopModule" Val="design_1_wrapper"/>
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</Config>
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<FileSet Name="constrs_1" Type="Constrs" RelSrcDir="$PSRCDIR/constrs_1" RelGenDir="$PGENDIR/constrs_1">
<Filter Type="Constrs"/>
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<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
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<Config>
<Option Name="ConstrsType" Val="XDC"/>
</Config>
</FileSet>
<FileSet Name="sim_1" Type="SimulationSrcs" RelSrcDir="$PSRCDIR/sim_1" RelGenDir="$PGENDIR/sim_1">
<Filter Type="Srcs"/>
<Config>
<Option Name="DesignMode" Val="RTL"/>
<Option Name="TopModule" Val="design_1_wrapper"/>
<Option Name="TopLib" Val="xil_defaultlib"/>
<Option Name="TopAutoSet" Val="TRUE"/>
<Option Name="TransportPathDelay" Val="0"/>
<Option Name="TransportIntDelay" Val="0"/>
<Option Name="SelectedSimModel" Val="rtl"/>
<Option Name="PamDesignTestbench" Val=""/>
<Option Name="PamDutBypassFile" Val="xil_dut_bypass"/>
<Option Name="PamSignalDriverFile" Val="xil_bypass_driver"/>
<Option Name="PamPseudoTop" Val="pseudo_tb"/>
<Option Name="SrcSet" Val="sources_1"/>
</Config>
</FileSet>
<FileSet Name="utils_1" Type="Utils" RelSrcDir="$PSRCDIR/utils_1" RelGenDir="$PGENDIR/utils_1">
<Filter Type="Utils"/>
<File Path="$PPRDIR/../hdmi-out-test/hdmi-out-test.srcs/utils_1/imports/synth_2/design_1_wrapper.dcp">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
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<Attr Name="UsedInSteps" Val="synth_2"/>
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</File>
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</File>
<Config>
<Option Name="TopAutoSet" Val="TRUE"/>
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<Config>
<Option Name="TopModule" Val="design_1_d_axi_i2s_audio_0_0"/>
<Option Name="UseBlackboxStub" Val="1"/>
</Config>
</FileSet>
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<Config>
<Option Name="TopModule" Val="design_1_v_tc_0_0"/>
<Option Name="UseBlackboxStub" Val="1"/>
</Config>
</FileSet>
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<Config>
<Option Name="TopModule" Val="design_1_v_axi4s_vid_out_0_0"/>
<Option Name="UseBlackboxStub" Val="1"/>
</Config>
</FileSet>
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<Config>
<Option Name="TopModule" Val="design_1_rst_processing_system7_0_100M_0"/>
<Option Name="UseBlackboxStub" Val="1"/>
</Config>
</FileSet>
<FileSet Name="design_1_axi_dma_0_0" Type="BlockSrcs" RelSrcDir="$PSRCDIR/design_1_axi_dma_0_0" RelGenDir="$PGENDIR/design_1_axi_dma_0_0">
<Config>
<Option Name="TopModule" Val="design_1_axi_dma_0_0"/>
<Option Name="UseBlackboxStub" Val="1"/>
</Config>
</FileSet>
<FileSet Name="design_1_axi_iic_0_0" Type="BlockSrcs" RelSrcDir="$PSRCDIR/design_1_axi_iic_0_0" RelGenDir="$PGENDIR/design_1_axi_iic_0_0">
<Config>
<Option Name="TopModule" Val="design_1_axi_iic_0_0"/>
<Option Name="UseBlackboxStub" Val="1"/>
</Config>
</FileSet>
<FileSet Name="design_1_xbar_0" Type="BlockSrcs" RelSrcDir="$PSRCDIR/design_1_xbar_0" RelGenDir="$PGENDIR/design_1_xbar_0">
<Config>
<Option Name="TopModule" Val="design_1_xbar_0"/>
<Option Name="UseBlackboxStub" Val="1"/>
</Config>
</FileSet>
<FileSet Name="design_1_processing_system7_0_0" Type="BlockSrcs" RelSrcDir="$PSRCDIR/design_1_processing_system7_0_0" RelGenDir="$PGENDIR/design_1_processing_system7_0_0">
<Config>
<Option Name="TopModule" Val="design_1_processing_system7_0_0"/>
<Option Name="UseBlackboxStub" Val="1"/>
</Config>
</FileSet>
<FileSet Name="design_1_axi_gpio_0_0" Type="BlockSrcs" RelSrcDir="$PSRCDIR/design_1_axi_gpio_0_0" RelGenDir="$PGENDIR/design_1_axi_gpio_0_0">
<Config>
<Option Name="TopModule" Val="design_1_axi_gpio_0_0"/>
<Option Name="UseBlackboxStub" Val="1"/>
</Config>
</FileSet>
<FileSet Name="design_1_xbar_1" Type="BlockSrcs" RelSrcDir="$PSRCDIR/design_1_xbar_1" RelGenDir="$PGENDIR/design_1_xbar_1">
<Config>
<Option Name="TopModule" Val="design_1_xbar_1"/>
<Option Name="UseBlackboxStub" Val="1"/>
</Config>
</FileSet>
<FileSet Name="design_1_v_tpg_0_0" Type="BlockSrcs" RelSrcDir="$PSRCDIR/design_1_v_tpg_0_0" RelGenDir="$PGENDIR/design_1_v_tpg_0_0">
<Config>
<Option Name="TopModule" Val="design_1_v_tpg_0_0"/>
<Option Name="UseBlackboxStub" Val="1"/>
</Config>
</FileSet>
<FileSet Name="design_1_rgb2dvi_0_0" Type="BlockSrcs" RelSrcDir="$PSRCDIR/design_1_rgb2dvi_0_0" RelGenDir="$PGENDIR/design_1_rgb2dvi_0_0">
<Config>
<Option Name="TopModule" Val="design_1_rgb2dvi_0_0"/>
<Option Name="UseBlackboxStub" Val="1"/>
</Config>
</FileSet>
<FileSet Name="design_1_rst_processing_system7_0_100M1_0" Type="BlockSrcs" RelSrcDir="$PSRCDIR/design_1_rst_processing_system7_0_100M1_0" RelGenDir="$PGENDIR/design_1_rst_processing_system7_0_100M1_0">
<Config>
<Option Name="TopModule" Val="design_1_rst_processing_system7_0_100M1_0"/>
<Option Name="UseBlackboxStub" Val="1"/>
</Config>
</FileSet>
<FileSet Name="design_1_v_vid_in_axi4s_0_0" Type="BlockSrcs" RelSrcDir="$PSRCDIR/design_1_v_vid_in_axi4s_0_0" RelGenDir="$PGENDIR/design_1_v_vid_in_axi4s_0_0">
<Config>
<Option Name="TopModule" Val="design_1_v_vid_in_axi4s_0_0"/>
<Option Name="UseBlackboxStub" Val="1"/>
</Config>
</FileSet>
<FileSet Name="design_1_v_tc_0_1" Type="BlockSrcs" RelSrcDir="$PSRCDIR/design_1_v_tc_0_1" RelGenDir="$PGENDIR/design_1_v_tc_0_1">
<Config>
<Option Name="TopModule" Val="design_1_v_tc_0_1"/>
<Option Name="UseBlackboxStub" Val="1"/>
</Config>
</FileSet>
<FileSet Name="design_1_rst_processing_system7_0_100M_1" Type="BlockSrcs" RelSrcDir="$PSRCDIR/design_1_rst_processing_system7_0_100M_1" RelGenDir="$PGENDIR/design_1_rst_processing_system7_0_100M_1">
<Config>
<Option Name="TopModule" Val="design_1_rst_processing_system7_0_100M_1"/>
<Option Name="UseBlackboxStub" Val="1"/>
</Config>
</FileSet>
<FileSet Name="design_1_dvi2rgb_0_1" Type="BlockSrcs" RelSrcDir="$PSRCDIR/design_1_dvi2rgb_0_1" RelGenDir="$PGENDIR/design_1_dvi2rgb_0_1">
<Config>
<Option Name="TopModule" Val="design_1_dvi2rgb_0_1"/>
<Option Name="UseBlackboxStub" Val="1"/>
</Config>
</FileSet>
<FileSet Name="design_1_system_ila_0_1" Type="BlockSrcs" RelSrcDir="$PSRCDIR/design_1_system_ila_0_1" RelGenDir="$PGENDIR/design_1_system_ila_0_1">
<Config>
<Option Name="TopModule" Val="design_1_system_ila_0_1"/>
<Option Name="UseBlackboxStub" Val="1"/>
</Config>
</FileSet>
</FileSets>
<Simulators>
<Simulator Name="XSim">
<Option Name="Description" Val="Vivado Simulator"/>
<Option Name="CompiledLib" Val="0"/>
</Simulator>
<Simulator Name="ModelSim">
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#set_property IOSTANDARD LVCMOS33 [get_ports {btns_4bits_tri_i_0}]
#set_property IOSTANDARD LVCMOS33 [get_ports {btns_4bits_tri_i_1}]
#set_property IOSTANDARD LVCMOS33 [get_ports {btns_4bits_tri_i_2}]
#set_property IOSTANDARD LVCMOS33 [get_ports {btns_4bits_tri_i_3}]
set_property IOSTANDARD LVCMOS33 [get_ports {leds_4bits_tri_o_0}]
set_property IOSTANDARD LVCMOS33 [get_ports {leds_4bits_tri_o_1}]
set_property IOSTANDARD LVCMOS33 [get_ports {leds_4bits_tri_o_2}]
set_property IOSTANDARD LVCMOS33 [get_ports {leds_4bits_tri_o_3}]
#set_property IOSTANDARD LVCMOS33 [get_ports {sws_2bits_tri_i_0}]
#set_property IOSTANDARD LVCMOS33 [get_ports {sws_2bits_tri_i_1}]
#set_property IOSTANDARD LVCMOS33 [get_ports {sys_clk}]
#set_property IOSTANDARD LVCMOS33 [get_ports {JA1}]
#set_property IOSTANDARD LVCMOS33 [get_ports {JA2}]
#set_property IOSTANDARD LVCMOS33 [get_ports {JA3}]
#set_property IOSTANDARD LVCMOS33 [get_ports {JA4}]
#set_property IOSTANDARD LVCMOS33 [get_ports {JA7}]
#set_property IOSTANDARD LVCMOS33 [get_ports {JA8}]
#set_property IOSTANDARD LVCMOS33 [get_ports {JA9}]
#set_property IOSTANDARD LVCMOS33 [get_ports {JA10}]
#set_property IOSTANDARD LVCMOS33 [get_ports {JB1}]
#set_property IOSTANDARD LVCMOS33 [get_ports {JB2}]
#set_property IOSTANDARD LVCMOS33 [get_ports {JB3}]
#set_property IOSTANDARD LVCMOS33 [get_ports {JB4}]
#set_property IOSTANDARD LVCMOS33 [get_ports {JB7}]
#set_property IOSTANDARD LVCMOS33 [get_ports {JB8}]
#set_property IOSTANDARD LVCMOS33 [get_ports {JB9}]
#set_property IOSTANDARD LVCMOS33 [get_ports {JB10}]
#set_property IOSTANDARD LVCMOS33 [get_ports {i2c_scl_i}]
#set_property IOSTANDARD LVCMOS33 [get_ports {i2c_sda_i}]
#set_property IOSTANDARD LVCMOS33 [get_ports {rgb_led_tri_o_0}]
#set_property IOSTANDARD LVCMOS33 [get_ports {rgb_led_tri_o_1}]
#set_property IOSTANDARD LVCMOS33 [get_ports {rgb_led_tri_o_2}]
#set_property IOSTANDARD LVCMOS33 [get_ports {rgb_led_tri_o_3}]
#set_property IOSTANDARD LVCMOS33 [get_ports {rgb_led_tri_o_4}]
#set_property IOSTANDARD LVCMOS33 [get_ports {rgb_led_tri_o_5}]
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a0_a13_tri_i_0}]
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a0_a13_tri_i_1}]
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a0_a13_tri_i_2}]
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a0_a13_tri_i_3}]
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a0_a13_tri_i_4}]
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a0_a13_tri_i_5}]
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a0_a13_tri_i_6}]
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a0_a13_tri_i_7}]
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a0_a13_tri_i_8}]
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a0_a13_tri_i_9}]
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a0_a13_tri_i_10}]
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a0_a13_tri_i_11}]
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a0_a13_tri_i_12}]
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a0_a13_tri_i_13}]
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_0}]
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_1}]
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_2}]
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_3}]
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_4}]
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_5}]
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_6}]
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_7}]
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_8}]
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_9}]
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_10}]
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_11}]
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_12}]
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_13}]
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_14}]
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_15}]
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_16}]
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_17}]
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_18}]
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_19}]
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_20}]
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_21}]
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_22}]
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_23}]
#set_property IOSTANDARD LVCMOS33 [get_ports {raspberry_pi_tri_i_24}]
#set_property IOSTANDARD LVCMOS33 [get_ports {spi_miso_i}]
#set_property IOSTANDARD LVCMOS33 [get_ports {spi_mosi_i}]
#set_property IOSTANDARD LVCMOS33 [get_ports {spi_sclk_i}]
#set_property IOSTANDARD LVCMOS33 [get_ports {spi_ss_i}]
#set_property IOSTANDARD LVCMOS33 [get_ports {hdmi_rx_hpd}]
set_property IOSTANDARD TMDS_33 [get_ports {TMDS_Clk_p_1}]
set_property IOSTANDARD TMDS_33 [get_ports {TMDS_Clk_n_1}]
set_property IOSTANDARD TMDS_33 [get_ports {TMDS_Data_p_1[0]}]
set_property IOSTANDARD TMDS_33 [get_ports {TMDS_Data_p_1[1]}]
set_property IOSTANDARD TMDS_33 [get_ports {TMDS_Data_p_1[2]}]
set_property IOSTANDARD TMDS_33 [get_ports {TMDS_Data_n_1[0]}]
set_property IOSTANDARD TMDS_33 [get_ports {TMDS_Data_n_1[1]}]
set_property IOSTANDARD TMDS_33 [get_ports {TMDS_Data_n_1[2]}]
#set_property IOSTANDARD LVCMOS33 [get_ports {hdmi_tx_hpd}]
set_property IOSTANDARD TMDS_33 [get_ports {TMDS_Clk_p_0}]
set_property IOSTANDARD TMDS_33 [get_ports {TMDS_Clk_n_0}]
set_property IOSTANDARD TMDS_33 [get_ports {TMDS_Data_p_0[0]}]
set_property IOSTANDARD TMDS_33 [get_ports {TMDS_Data_p_0[1]}]
set_property IOSTANDARD TMDS_33 [get_ports {TMDS_Data_p_0[2]}]
set_property IOSTANDARD TMDS_33 [get_ports {TMDS_Data_n_0[0]}]
set_property IOSTANDARD TMDS_33 [get_ports {TMDS_Data_n_0[1]}]
set_property IOSTANDARD TMDS_33 [get_ports {TMDS_Data_n_0[2]}]
#set_property IOSTANDARD LVCMOS33 [get_ports {hdmi_in_ddc_scl}]
#set_property IOSTANDARD LVCMOS33 [get_ports {hdmi_in_ddc_sda}]
#set_property IOSTANDARD LVCMOS33 [get_ports {respberry_sd_i}]
#set_property IOSTANDARD LVCMOS33 [get_ports {respberry_sc_i}]
#set_property IOSTANDARD LVCMOS33 [get_ports {hdmi_tx_cec}]
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a0}]
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a1}]
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a2}]
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a3}]
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a4}]
#set_property IOSTANDARD LVCMOS33 [get_ports {arduino_a5}]
#set_property IOSTANDARD LVCMOS33 [get_ports {audio_sd_i}]
#set_property IOSTANDARD LVCMOS33 [get_ports {audio_sc_i}]
#set_property IOSTANDARD LVCMOS33 [get_ports {audio_adr_0}]
#set_property IOSTANDARD LVCMOS33 [get_ports {audio_adr_1}]
#set_property IOSTANDARD LVCMOS33 [get_ports {audio_clk}]
#
#set_property IOSTANDARD LVCMOS33 [get_ports {bclk_i}]
#set_property IOSTANDARD LVCMOS33 [get_ports {wclk_i}]
#set_property IOSTANDARD LVCMOS33 [get_ports {sdada_out_i}]
#set_property IOSTANDARD LVCMOS33 [get_ports {sdata_in_i}]
#set_property PACKAGE_PIN D19 [get_ports {btns_4bits_tri_i_0}]
#set_property PACKAGE_PIN D20 [get_ports {btns_4bits_tri_i_1}]
#set_property PACKAGE_PIN L20 [get_ports {btns_4bits_tri_i_2}]
#set_property PACKAGE_PIN L19 [get_ports {btns_4bits_tri_i_3}]
set_property PACKAGE_PIN R14 [get_ports {leds_4bits_tri_o_0}]
set_property PACKAGE_PIN P14 [get_ports {leds_4bits_tri_o_1}]
set_property PACKAGE_PIN N16 [get_ports {leds_4bits_tri_o_2}]
set_property PACKAGE_PIN M14 [get_ports {leds_4bits_tri_o_3}]
#set_property PACKAGE_PIN M20 [get_ports {sws_2bits_tri_i_0}]
#set_property PACKAGE_PIN M19 [get_ports {sws_2bits_tri_i_1}]
#set_property PACKAGE_PIN H16 [get_ports {sys_clk}]
#set_property PACKAGE_PIN Y18 [get_ports {JA1}]
#set_property PACKAGE_PIN Y19 [get_ports {JA2}]
#set_property PACKAGE_PIN Y16 [get_ports {JA3}]
#set_property PACKAGE_PIN Y17 [get_ports {JA4}]
#set_property PACKAGE_PIN U18 [get_ports {JA7}]
#set_property PACKAGE_PIN U19 [get_ports {JA8}]
#set_property PACKAGE_PIN W18 [get_ports {JA9}]
#set_property PACKAGE_PIN W19 [get_ports {JA10}]
#set_property PACKAGE_PIN W14 [get_ports {JB1}]
#set_property PACKAGE_PIN Y14 [get_ports {JB2}]
#set_property PACKAGE_PIN T11 [get_ports {JB3}]
#set_property PACKAGE_PIN T10 [get_ports {JB4}]
#set_property PACKAGE_PIN V16 [get_ports {JB7}]
#set_property PACKAGE_PIN W16 [get_ports {JB8}]
#set_property PACKAGE_PIN V12 [get_ports {JB9}]
#set_property PACKAGE_PIN W13 [get_ports {JB10}]
#set_property PACKAGE_PIN P15 [get_ports {i2c_scl_i}]
#set_property PACKAGE_PIN P16 [get_ports {i2c_sda_i}]
#set_property PACKAGE_PIN L15 [get_ports {rgb_led_tri_o_0}]
#set_property PACKAGE_PIN G17 [get_ports {rgb_led_tri_o_1}]
#set_property PACKAGE_PIN N15 [get_ports {rgb_led_tri_o_2}]
#set_property PACKAGE_PIN G14 [get_ports {rgb_led_tri_o_3}]
#set_property PACKAGE_PIN L14 [get_ports {rgb_led_tri_o_4}]
#set_property PACKAGE_PIN M15 [get_ports {rgb_led_tri_o_5}]
#set_property PACKAGE_PIN T14 [get_ports {arduino_a0_a13_tri_i_0}]
#set_property PACKAGE_PIN U12 [get_ports {arduino_a0_a13_tri_i_1}]
#set_property PACKAGE_PIN U13 [get_ports {arduino_a0_a13_tri_i_2}]
#set_property PACKAGE_PIN V13 [get_ports {arduino_a0_a13_tri_i_3}]
#set_property PACKAGE_PIN V15 [get_ports {arduino_a0_a13_tri_i_4}]
#set_property PACKAGE_PIN T15 [get_ports {arduino_a0_a13_tri_i_5}]
#set_property PACKAGE_PIN R16 [get_ports {arduino_a0_a13_tri_i_6}]
#set_property PACKAGE_PIN U17 [get_ports {arduino_a0_a13_tri_i_7}]
#set_property PACKAGE_PIN V17 [get_ports {arduino_a0_a13_tri_i_8}]
#set_property PACKAGE_PIN V18 [get_ports {arduino_a0_a13_tri_i_9}]
#set_property PACKAGE_PIN T16 [get_ports {arduino_a0_a13_tri_i_10}]
#set_property PACKAGE_PIN R17 [get_ports {arduino_a0_a13_tri_i_11}]
#set_property PACKAGE_PIN P18 [get_ports {arduino_a0_a13_tri_i_12}]
#set_property PACKAGE_PIN N17 [get_ports {arduino_a0_a13_tri_i_13}]
#set_property PACKAGE_PIN W18 [get_ports {raspberry_pi_tri_i_0}]
#set_property PACKAGE_PIN W19 [get_ports {raspberry_pi_tri_i_1}]
#set_property PACKAGE_PIN Y18 [get_ports {raspberry_pi_tri_i_2}]
#set_property PACKAGE_PIN Y19 [get_ports {raspberry_pi_tri_i_3}]
#set_property PACKAGE_PIN U18 [get_ports {raspberry_pi_tri_i_4}]
#set_property PACKAGE_PIN U19 [get_ports {raspberry_pi_tri_i_5}]
#set_property PACKAGE_PIN F19 [get_ports {raspberry_pi_tri_i_6}]
#set_property PACKAGE_PIN V10 [get_ports {raspberry_pi_tri_i_7}]
#set_property PACKAGE_PIN V8 [get_ports {raspberry_pi_tri_i_8}]
#set_property PACKAGE_PIN W10 [get_ports {raspberry_pi_tri_i_9}]
#set_property PACKAGE_PIN B20 [get_ports {raspberry_pi_tri_i_10}]
#set_property PACKAGE_PIN W8 [get_ports {raspberry_pi_tri_i_11}]
#set_property PACKAGE_PIN V6 [get_ports {raspberry_pi_tri_i_12}]
#set_property PACKAGE_PIN Y6 [get_ports {raspberry_pi_tri_i_13}]
#set_property PACKAGE_PIN B19 [get_ports {raspberry_pi_tri_i_14}]
#set_property PACKAGE_PIN U7 [get_ports {raspberry_pi_tri_i_15}]
#set_property PACKAGE_PIN C20 [get_ports {raspberry_pi_tri_i_16}]
#set_property PACKAGE_PIN Y8 [get_ports {raspberry_pi_tri_i_17}]
#set_property PACKAGE_PIN A20 [get_ports {raspberry_pi_tri_i_18}]
#set_property PACKAGE_PIN Y9 [get_ports {raspberry_pi_tri_i_19}]
#set_property PACKAGE_PIN U8 [get_ports {raspberry_pi_tri_i_20}]
#set_property PACKAGE_PIN W6 [get_ports {raspberry_pi_tri_i_21}]
#set_property PACKAGE_PIN Y7 [get_ports {raspberry_pi_tri_i_22}]
#set_property PACKAGE_PIN F20 [get_ports {raspberry_pi_tri_i_23}]
#set_property PACKAGE_PIN W9 [get_ports {raspberry_pi_tri_i_24}]
#set_property PACKAGE_PIN W15 [get_ports {spi_miso_i}]
#set_property PACKAGE_PIN T12 [get_ports {spi_mosi_i}]
#set_property PACKAGE_PIN H15 [get_ports {spi_sclk_i}]
#set_property PACKAGE_PIN F16 [get_ports {spi_ss_i}]
#set_property PACKAGE_PIN T19 [get_ports {hdmi_rx_hpd}]
set_property PACKAGE_PIN N18 [get_ports {TMDS_Clk_p_1}]
set_property PACKAGE_PIN P19 [get_ports {TMDS_Clk_n_1}]
set_property PACKAGE_PIN V20 [get_ports {TMDS_Data_p_1[0]}]
set_property PACKAGE_PIN T20 [get_ports {TMDS_Data_p_1[1]}]
set_property PACKAGE_PIN N20 [get_ports {TMDS_Data_p_1[2]}]
set_property PACKAGE_PIN W20 [get_ports {TMDS_Data_n_1[0]}]
set_property PACKAGE_PIN U20 [get_ports {TMDS_Data_n_1[1]}]
set_property PACKAGE_PIN P20 [get_ports {TMDS_Data_n_1[2]}]
#set_property PACKAGE_PIN R19 [get_ports {hdmi_tx_hpd}]
set_property PACKAGE_PIN L16 [get_ports {TMDS_Clk_p_0}]
set_property PACKAGE_PIN L17 [get_ports {TMDS_Clk_n_0}]
set_property PACKAGE_PIN K17 [get_ports {TMDS_Data_p_0[0]}]
set_property PACKAGE_PIN K19 [get_ports {TMDS_Data_p_0[1]}]
set_property PACKAGE_PIN J18 [get_ports {TMDS_Data_p_0[2]}]
set_property PACKAGE_PIN K18 [get_ports {TMDS_Data_n_0[0]}]
set_property PACKAGE_PIN J19 [get_ports {TMDS_Data_n_0[1]}]
set_property PACKAGE_PIN H18 [get_ports {TMDS_Data_n_0[2]}]
#set_property PACKAGE_PIN U14 [get_ports {hdmi_in_ddc_scl}]
#set_property PACKAGE_PIN U15 [get_ports {hdmi_in_ddc_sda}]
#set_property PACKAGE_PIN Y16 [get_ports {respberry_sd_i}]
#set_property PACKAGE_PIN Y17 [get_ports {respberry_sc_i}]
#set_property PACKAGE_PIN G15 [get_ports {hdmi_tx_cec}]
#set_property PACKAGE_PIN Y11 [get_ports {arduino_a0}]
#set_property PACKAGE_PIN Y12 [get_ports {arduino_a1}]
#set_property PACKAGE_PIN W11 [get_ports {arduino_a2}]
#set_property PACKAGE_PIN V11 [get_ports {arduino_a3}]
#set_property PACKAGE_PIN T5 [get_ports {arduino_a4}]
#set_property PACKAGE_PIN U10 [get_ports {arduino_a5}]
#AU_SDA_R AU_SCL_R ADR0 ADR1 AU_MCLK_R
#set_property PACKAGE_PIN T9 [get_ports {audio_sd_i}]
#set_property PACKAGE_PIN U9 [get_ports {audio_sc_i}]
#set_property PACKAGE_PIN M17 [get_ports {audio_adr_0}]
#set_property PACKAGE_PIN M18 [get_ports {audio_adr_1}]
#set_property PACKAGE_PIN U5 [get_ports {audio_clk}]
#AU_BCLK_R AU_WCLK_R AU_DIN_R AU_DOUT_R
#set_property PACKAGE_PIN R18 [get_ports {bclk_i}]
#set_property PACKAGE_PIN T17 [get_ports {wclk_i}]
#set_property PACKAGE_PIN G18 [get_ports {sdada_out_i}]
#set_property PACKAGE_PIN F17 [get_ports {sdata_in_i}]
#AU_SDA
#AU_SCL
#ADR0
#ADR1
#AU_MCLK
#AU_BCLK
#AU_WCLK
#AU_DOUT
#AU_DIN
set_property PACKAGE_PIN G18 [get_ports {SDATA_O}]
set_property PACKAGE_PIN F17 [get_ports {SDATA_I}]
set_property PACKAGE_PIN R18 [get_ports {BCLK_O}]
set_property PACKAGE_PIN T17 [get_ports {LRCLK_O}]
set_property PACKAGE_PIN U5 [get_ports {MCLK_O}]
set_property PACKAGE_PIN U9 [get_ports {iic_rtl_scl_io}]
set_property PACKAGE_PIN T9 [get_ports {iic_rtl_sda_io}]
set_property IOSTANDARD LVCMOS33 [get_ports {SDATA_O}]
set_property IOSTANDARD LVCMOS33 [get_ports {SDATA_I}]
set_property IOSTANDARD LVCMOS33 [get_ports {BCLK_O}]
set_property IOSTANDARD LVCMOS33 [get_ports {LRCLK_O}]
set_property IOSTANDARD LVCMOS33 [get_ports {MCLK_O}]
set_property IOSTANDARD LVCMOS33 [get_ports {iic_rtl_scl_io}]
set_property IOSTANDARD LVCMOS33 [get_ports {iic_rtl_sda_io}]

6
hdmi-in-test/xdc/timing.xdc 100644
View File

@ -0,0 +1,6 @@
#create_clock -period 13.468 -waveform {0.000 5.000} [get_ports hdmi_rx_clk_p]
#from digilent datasheet. Compile OK
create_clock -period 13.468 -waveform {0.000 5.000} [get_ports TMDS_Clk_p_1]
#from pynq ref design. compile failed due to VCO issues
#create_clock -period 8.334 -waveform {0.000 4.167} [get_ports TMDS_Clk_p_1]