Commit Graph

7 Commits (176f5ba7880e02b90596aa3bf641d77d2a402285)
 

Author SHA1 Message Date
neyko3 176f5ba788 added hdmi-thru (without buffering)
basically connected HDMI_IN -> dvi2rgb -> rgb_op0 -> rgb2dvi -> HDMI_OUT

rgb_op0 operation:
 SW0[0] | Description
 0      | Normal color
 1      | inverted color

can get image correctly from my laptop

This demo only needs the FPGA bit file to run (no need for vitis apparently)
2024-05-20 16:40:30 +09:00
neyko3 fe59f073b7 added hdmi-in (loop hdmi-out->hdmi-in) 2024-05-08 14:31:27 +09:00
neyko3 ea535d7e0f added digilent ips as submodule 2024-04-24 11:37:00 +09:00
neyko3 556b36bdad added hdmi-out demo 2024-04-24 11:25:48 +09:00
neyko3 70e67299f8 added ARM_DMA demo 2024-04-16 18:12:34 +09:00
neyko3 fd750805b3 reorganized vitis files
moved all vitis project files to be tracked to "Blinki.files"

  Blinki.files/src:
    link this dir to an empty c vitis project workspac

  Blinki.files/Debug:
    save Debug outputs here that you want to commit.
    Not necessary to recreate the project

1. i recommend to follow the same naming convention, i.e. Blinki.files
should be used in a project named "Blinki"

2. use *.vitis as vitis workspace (classic)
2024-04-16 10:41:36 +09:00
neyko3 4dbdde85b6 first commit 2024-04-15 18:33:16 +09:00