forked from FPGALover/RISCV_picorv32_fpga
32 lines
1.3 KiB
Plaintext
32 lines
1.3 KiB
Plaintext
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# -------------------------------------------------------------------------- #
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#
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# Copyright (C) 2016 Intel Corporation. All rights reserved.
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# Your use of Intel Corporation's design tools, logic functions
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# and other software and tools, and its AMPP partner logic
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# functions, and any output files from any of the foregoing
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# (including device programming or simulation files), and any
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# associated documentation or information are expressly subject
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# to the terms and conditions of the Intel Program License
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# Subscription Agreement, the Intel Quartus Prime License Agreement,
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# the Intel MegaCore Function License Agreement, or other
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# applicable license agreement, including, without limitation,
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# that your use is for the sole purpose of programming logic
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# devices manufactured by Intel and sold by Intel or its
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# authorized distributors. Please refer to the applicable
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# agreement for further details.
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#
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# -------------------------------------------------------------------------- #
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#
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# Quartus Prime
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# Version 16.1.0 Build 196 10/24/2016 SJ Lite Edition
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# Date created = 12:17:05 March 19, 2017
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#
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# -------------------------------------------------------------------------- #
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QUARTUS_VERSION = "16.1"
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DATE = "12:17:05 March 19, 2017"
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# Revisions
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PROJECT_REVISION = "xoro"
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