forked from FPGALover/RISCV_picorv32_fpga
61 lines
1.1 KiB
ArmAsm
61 lines
1.1 KiB
ArmAsm
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# See LICENSE for license details.
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#*****************************************************************************
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# jal.S
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#-----------------------------------------------------------------------------
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#
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# Test jal instruction.
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#
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#include "riscv_test.h"
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#include "test_macros.h"
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RVTEST_RV32U
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RVTEST_CODE_BEGIN
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#-------------------------------------------------------------
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# Test 2: Basic test
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#-------------------------------------------------------------
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test_2:
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li TESTNUM, 2
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li ra, 0
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linkaddr_2:
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jal target_2
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nop
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nop
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j fail
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target_2:
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la x2, linkaddr_2
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addi x2, x2, 4
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bne x2, ra, fail
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#-------------------------------------------------------------
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# Test delay slot instructions not executed nor bypassed
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#-------------------------------------------------------------
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TEST_CASE( 3, x2, 3, \
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li x2, 1; \
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jal 1f; \
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addi x2, x2, 1; \
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addi x2, x2, 1; \
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addi x2, x2, 1; \
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addi x2, x2, 1; \
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1: addi x2, x2, 1; \
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addi x2, x2, 1; \
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)
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TEST_PASSFAIL
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RVTEST_CODE_END
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.data
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RVTEST_DATA_BEGIN
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TEST_DATA
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RVTEST_DATA_END
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