forked from FPGALover/RISCV_picorv32_fpga
Update README.md
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README.md
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README.md
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@ -12,17 +12,17 @@ mkdir build/
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cd build
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sudo mkdir /opt/riscv32im
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sudo chown $USER /opt/riscv32im
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./configure --with-arch=rv32im --prefix=/opt/riscv32im
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../configure --with-arch=rv32im --prefix=/opt/riscv32im
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make -j$(nproc)
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```
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#### For other architectures or variations of RISC-V
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| Command | ISA |
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|:---------------------------------------- |:-------- |
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|`./configure --with-arch=rv32i --prefix=/opt/riscv32i/ `| `RV32I `|
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|`./configure --with-arch=rv32ic --prefix=/opt/riscv32ic/ `| `RV32IC `|
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|`./configure --with-arch=rv32im --prefix=/opt/riscv32im/` | `RV32IM `|
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|`./configure --with-arch=rv32imc --prefix=/opt/riscv32imc/`| `RV32IMC `|
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|`../configure --with-arch=rv32i --prefix=/opt/riscv32i/ `| `RV32I `|
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|`../configure --with-arch=rv32ic --prefix=/opt/riscv32ic/ `| `RV32IC `|
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|`../configure --with-arch=rv32im --prefix=/opt/riscv32im/` | `RV32IM `|
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|`../configure --with-arch=rv32imc --prefix=/opt/riscv32imc/`| `RV32IMC `|
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### 2. Corss-Compiling C code for the RISCV picorv32 on WSL or on Linux.
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