forked from FPGALover/RISCV_picorv32_fpga
modifying readme
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README.md
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README.md
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@ -2,15 +2,15 @@
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##building RISC-V from scratch, using Linux or WSL
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>sudo apt-get update
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sudo apt-get install autoconf automake autotools-dev curl python3 python3-pip libmpc-dev libmpfr-dev libgmp-dev gawk build-essential bison flex texinfo gperf libtool patchutils bc zlib1g-dev libexpat-dev ninja-build git cmake libglib2.0-dev
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git clone https://github.com/riscv/riscv-gnu-toolchain
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cd riscv-gnu-toolchain/
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mkdir build/
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cd build
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sudo mkdir /opt/riscv32im
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sudo chown $USER /opt/riscv32im
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./configure --with-arch=rv32im --prefix=/opt/riscv32im
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make -j$(nproc)
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>sudo apt-get install autoconf automake autotools-dev curl python3 python3-pip libmpc-dev libmpfr-dev libgmp-dev gawk build-essential bison flex texinfo gperf libtool patchutils bc zlib1g-dev libexpat-dev ninja-build git cmake libglib2.0-dev
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>git clone https://github.com/riscv/riscv-gnu-toolchain
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>cd riscv-gnu-toolchain/
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>mkdir build/
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>cd build
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>sudo mkdir /opt/riscv32im
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>sudo chown $USER /opt/riscv32im
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>./configure --with-arch=rv32im --prefix=/opt/riscv32im
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>make -j$(nproc)
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# For other architectures or variations of RISC-V
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./configure --with-arch=rv32i /opt/riscv32i/ --> for RV32I
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