# RISCV(picorv32) on FPGA

## Building RISC-V from scratch, using Linux or WSL
```html
sudo apt-get update
sudo apt-get install autoconf automake autotools-dev curl python3 python3-pip libmpc-dev libmpfr-dev libgmp-dev gawk build-essential bison flex texinfo gperf libtool patchutils bc zlib1g-dev libexpat-dev ninja-build git cmake libglib2.0-dev
git clone https://github.com/riscv/riscv-gnu-toolchain
cd riscv-gnu-toolchain/
mkdir build/
cd build
sudo mkdir /opt/riscv32im
sudo chown $USER /opt/riscv32im
./configure --with-arch=rv32im --prefix=/opt/riscv32im
make -j$(nproc)
```

## For other architectures or variations of RISC-V
| Command                                  | ISA       |
|:---------------------------------------- |:--------  |
|`./configure --with-arch=rv32i	--prefix=/opt/riscv32i/ 	 `| `RV32I     `|
|`./configure --with-arch=rv32ic	--prefix=/opt/riscv32ic/ `| `RV32IC    `|
|`./configure --with-arch=rv32im	--prefix=/opt/riscv32im/` | `RV32IM    `|
|`./configure --with-arch=rv32imc	--prefix=/opt/riscv32imc/`| `RV32IMC   `|
 
## Other Linux and Windows precompiled Toolchains
    - https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack/releases/ for mingw64
    - https://gnutoolchains.com/risc-v/ 


# Build the firmware 
```html
git clone https://gitea.squirrelnut.synology.me:5001/FPGALover/RISCV_picorv32_fpga 
cd  RISCV_picorv32_fpga/sw
make clean
make firmware/firmware.fpga
cp firmware/Memory.v_toplevel_memory_1_symbol* ../rtl/DE0-NANO
```
*Now you can compile or synthesize the FPGA harware using Quartus  or any other Design tool*