forked from FPGALover/RISCV_picorv32_fpga
26 lines
681 B
JSON
26 lines
681 B
JSON
{
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"name": "xoro",
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"version": "1.0.0",
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"description": "This is the picorv32 RISC-V processor in Verilog wrapped in some very simple memory and peripherals. Enough to get it working on a Terasic DE-0 Nano Cyclone IV FPGA board.",
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"main": "index.js",
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"directories": {
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"test": "tests"
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},
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"scripts": {
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"test": "echo \"Error: no test specified\" && exit 1"
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},
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"repository": {
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"type": "git",
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"url": "git+https://github.com/ZiCog/xoro.git"
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},
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"author": "",
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"license": "ISC",
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"bugs": {
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"url": "https://github.com/ZiCog/xoro/issues"
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},
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"homepage": "https://github.com/ZiCog/xoro#readme",
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"dependencies": {
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"serialport": "^7.0.2"
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}
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}
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