forked from FPGALover/RISCV_picorv32_fpga
94 lines
4.3 KiB
Plaintext
94 lines
4.3 KiB
Plaintext
#***************************************************************************
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# Copyright (c) 2012 by Michael Fischer. All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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#
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# 1. Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# 2. Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution.
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# 3. Neither the name of the author nor the names of its contributors may
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# be used to endorse or promote products derived from this software
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# without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
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# THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
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# THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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# SUCH DAMAGE.
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#
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#***************************************************************************
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# History:
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#
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# 01.08.2012 mifi First version
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#***************************************************************************
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#***************************************************************************
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# Create Clock
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#***************************************************************************
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create_clock -period 50MHz [get_ports CLOCK_50]
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create_clock -period 10MHz -name {altera_reserved_tck} {altera_reserved_tck}
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#***************************************************************************
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# Create Generated Clock
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#***************************************************************************
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derive_pll_clocks
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#***************************************************************************
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# Set Clock Latency
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#***************************************************************************
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#***************************************************************************
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# Set Clock Uncertainty
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#***************************************************************************
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derive_clock_uncertainty
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#***************************************************************************
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# Set Input Delay
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#***************************************************************************
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#***************************************************************************
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# Set Output Delay
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#***************************************************************************
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#***************************************************************************
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# Set Clock Groups
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#***************************************************************************
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#***************************************************************************
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# Set False Path
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#***************************************************************************
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set_false_path -from [get_clocks {altera_reserved_tck}] -to [get_clocks {altera_reserved_tck}]
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#***************************************************************************
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# Set Multicycle Path
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#***************************************************************************
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#***************************************************************************
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# Set Maximum Delay
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#***************************************************************************
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#***************************************************************************
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# Set Minimum Delay
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#***************************************************************************
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#***************************************************************************
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# Set Input Transition
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#***************************************************************************
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#***************************************************************************
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# Set Load
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#***************************************************************************
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#*** EOF *** |